Xilinx FPGAs - Getting Started¶
Acknowledgments¶
We appreciate the donation of 2x Alveo U280 boards and licenses from Xilinx’s University Program as well as the donation of an AC-510 and AC-511 HMC chip from Micron.
Xilinx FPGA Hardware¶
Currently, the Rogues Gallery hosts the following Xilinx FPGA hardware.
| FPGA Board | FPGA Chip | Memory | Hosting Machine | Notes |
|---|---|---|---|---|
| Xilinx Alveo U50 | 8 GB HBM | flubber1 | 2 boards | |
| Xilinx Alveo U250 | flubber9 | |||
| Xilinx Alveo U280 | flubber5 | 3 boards (1 currently) | ||
| Xilinx SmartSSD | flubber9 | |||
| AC-510 | XCVU060 (Pkg FFVA1156) | 4 GB HMC 1.0 | rg-fpga-cubed |
| FPGA Board | FPGA Chip | Memory | Hosting Machine | Notes |
|---|---|---|---|---|
| ZCU102 | ||||
| Versal VCK190 | TBD | |||
| Pynq Z2 | synestia2 | 50+ boards available for classes |
Accessing the Rogues Gallery Xilinx FPGAs¶
See the Reconfigurable Computing Workflow page for more details on the process to use this hardware.
The short version is:
- For emulation and development, please use the FPGA development VMs, rg-fpga-dev-<1-4>.
- For GUI-based development, use VNC, ideally with either Slurm or our OOD instance.
- For final bitstream compilation, request a hardware node using Slurm and run the tools on that node.
Xilinx Software¶
Please see the specifc pages on using Vitis (standard flow), `Vivado flow (advanced) <>`__, or frameworks for SmartNics like OpenNIC.
Vitis vs. Vivado vs..¶
Xilinx released the Vitis SW and HW focused framework officially in 2020 to complement existing tools like Vivado (for RTL-based designs), and replace existing tools like SDx (for OpenCL-based designs). However, it is still somewhat confusing as to which tool you might want to use for which situation. This issue on the Vitis Tutorials repo includes an insightful table from Víctor Vilches which we have included and modified slightly.
| Tool | Stakeholder | Aim of Tool |
|---|---|---|
| Vivado | Hardware engineer | Develops RTL (ie, Verilog) kernels |
| Vitis | Embedded engineer | Creates low level firmware, BSPs, boot sequences and integrates software and hardware efforts |
| Vitis HLS | Software engineer | Develops C, C++ or OpenCL kernels |
| Vitis AI | Data scientist | Uses HLS and frameworks to develop AI constructs/kernels |
Supported Versions of Xilinx Tools¶
With that in mind, we support the following versions of Xilinx software on our testbed:
| Software | Versions | Notes |
|---|---|---|
| Vitis | 2020.2, 2021.1, 2021.2, 2022.1 | |
| Vivado | 2020.2, 2021.1, 2021.2, 2022.1 | |
| Vitis HLS | 2020.2, 2021.1, 2021.2, 2022.1 | |
| Vitis-AI | ||
| SDAccel | 2019.2 | Deprecated |
- How to quickly start Vitis/Vivado 20.2:
How do I check the licenses that are available?¶
You can either use the licensing center from the GUI version of a tool like Vivado or Vitis, or you can run the following:
Getting started with AWS for development¶
Amazon supports F1 instances that have between 1 and 8 Xilinx FPGAs. Currently they support the VCU1525 with an Ultrascale+ part. Xilinx and Amazon both have good references on getting started with these instances.
Xilinx Accelerator Program¶
Xilinx has a program for faculty and staff that seems to provide discounts on Alveo board (~$1500 discount for up to two board) and links to existing resources for SDAccel, AWS, and Alveo products. These are normally behind a login wall, but please see the links below: