CRNCH Rogues Gallery
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General Topics

  • What is the Rogues Gallery?
  • Getting Started with Rogues Gallery
  • Rogues Gallery Hardware
  • Rogues Gallery Filesystems
  • Mailing Lists and Requesting Help
  • Vendor Forums
  • Contributing to this Documentation

RG Workflows

  • Python Environments
  • Rogues Gallery Workflows
  • Using Scrontab with Slurm
  • Using Slurm with RG Systems
  • Using Slurm Examples
  • Open OnDemand
  • Using GUI Applications with VNC
  • GUI Applications with x2Go (Legacy)
  • Visual Studio Code
  • Jupyter Notebooks

Novel HPC

  • Instinct - AMD MI210
  • Quorra - NVIDIA Ampere GPUs
  • Octavius - A64FX Testbed

Lucata Pathfinder

  • Lucata Pathfinder Getting Started
  • Lucata Pathfinder FAQs

Novel Networking

  • Smart Networking - Getting Started
  • Bluefield-2 DPU

Reconfigurable Computing

  • Xilinx FPGAs - Getting Started
  • Xilinx Vivado Flow
  • PYNQ cluster
  • Xilinx Smart SSD
  • Vortex RISC-V GPGPU
  • Intel OneAPI for Reconfigurable Computing
  • FPGA Power Measurement

RISC-V

  • RISC-V Hardware
  • Vortex RISC-V GPGPU

Miscellaneous

  • Power Monitoring

Educational Resources

  • CRNCH Rogues Gallery Tutorials
  • Near-memory Resources
  • GraphBLAS Resources
  • Neuromorphic Computing Resources
  • Quantum Computing Resources
  • Related Testbed Resources
CRNCH Rogues Gallery
  • Docs »
  • CRNCH Rogues Gallery Documentation
  • Edit on GitHub

CRNCH Rogues Gallery Documentation¶

The Rogues Gallery is a new concept focused on developing our understanding of next-generation hardware with a focus on unorthodox and uncommon technologies. This project, initiated by Georgia Tech’s Center for Research into Novel Computing Hierarchies (CRNCH), will acquire new and unique hardware (ie, the aforementioned “rogues”) from vendors, research labs, and startups and make this hardware available to students, faculty, and industry collaborators within a managed data center environment. By exposing students and researchers to this set of unique hardware, we hope to foster cross-cutting discussions about hardware designs that will drive future performance improvements in computing long after the Moore’s Law era of “cheap transistors” ends.

To see what hardware the Rogues Gallery currently includes, please see our hosted hardware page. For more information on the initial Rogues Gallery vision, please see our recent presentation at the 2021 CRNCH Summit [Slides] [Talk].

For updated status on the testbed please see our Spring 2022 talk [Slides]

NSF Acknowledgment: The Rogues Gallery testbed is primarily supported by the National Science Foundation (NSF) under NSF Award Number #2016701. Any opinions, findings and conclusions, or recommendations expressed in this documentation are those of the author(s), and do not necessarily reflect those of the NSF.

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