CRNCH Rogues Gallery
1.0

General Topics

  • What is the Rogues Gallery?
  • Mailing Lists and Requesting Help
  • Getting Started with Rogues Gallery
  • Rogues Gallery Hardware
  • Rogues Gallery Software
  • Rogues Gallery Filesystems
  • Contributing to this Documentation
  • Testbed Release Notes
  • RG Documentation Authors

RG Getting Started Topics

  • Using Slurm with RG Systems
  • Open OnDemand
  • Visual Studio Code
  • Python Environments
  • Using Containers with CRNCH RG

RG Advanced Topics

  • Using Scrontab with Slurm
  • Using GUI Applications with VNC
  • CI/CD Support

RG Workflows

  • Rogues Gallery Workflows
  • Profilers

Novel HPC

  • Instinct - AMD MI210
  • Quorra - NVIDIA Ampere GPUs
  • Violet - Sapphire Rapids
  • Octavius - A64FX Testbed
  • Kingpin - NVIDIA DevKit Systems

Lucata Pathfinder

  • Lucata Pathfinder Getting Started
  • Lucata Pathfinder Execution
  • Lucata Pathfinder FAQs

Neuromorphic Computing

  • Rudi - Jetson Dev Boards
  • Using NVIDIA Jetpack and PyTorch

Novel Networking

  • Smart Networking - Getting Started
  • BlueField DPUs

Quantum Computing

  • cuQuantum

ModSim and Chip Design

  • Firesim and ChipYard

Reconfigurable Computing

  • Xilinx FPGAs - Getting Started
  • Xilinx Vivado Flow
  • PYNQ cluster
  • Xilinx Smart SSD
  • Vortex RISC-V GPGPU
  • Xilinx ML Tools
  • Intel OneAPI for Reconfigurable Computing
  • Using Intel OneAPI with CRNCH Rogues Gallery
  • FPGA Power Measurement

RISC-V

  • RISC-V Hardware
  • Vortex RISC-V GPGPU

Techfee Systems

  • Frozone
  • Hopper - Grace Hopper Nodes
  • Dash - Sapphire Rapids Max

Miscellaneous

  • Power Monitoring

Educational Resources

  • CRNCH Rogues Gallery Tutorials
  • Near-memory Resources
  • GraphBLAS Resources
  • Neuromorphic Computing Resources
  • Quantum Computing Resources
  • Reconfig Computing Resources
  • Related Testbed Resources
CRNCH Rogues Gallery
  • CRNCH Rogues Gallery Documentation
  • Edit on GitHub

CRNCH Rogues Gallery Documentation

The Rogues Gallery is a new concept focused on developing our understanding of next-generation hardware with a focus on unorthodox and uncommon technologies. This project, initiated by Georgia Tech’s Center for Research into Novel Computing Hierarchies (CRNCH), will acquire new and unique hardware (ie, the aforementioned “rogues”) from vendors, research labs, and startups and make this hardware available to students, faculty, and industry collaborators within a managed data center environment. By exposing students and researchers to this set of unique hardware, we hope to foster cross-cutting discussions about hardware designs that will drive future performance improvements in computing long after the Moore’s Law era of “cheap transistors” ends.

To see what hardware the Rogues Gallery currently includes, please see our hosted hardware page. For more information on the initial Rogues Gallery vision, please see our recent presentation at the 2021 CRNCH Summit [Slides] [Talk].

For updated status on the testbed please see our Spring 2022 talk [Slides]

NSF Acknowledgment: The Rogues Gallery testbed is primarily supported by the National Science Foundation (NSF) under NSF Award Number #2016701. Any opinions, findings and conclusions, or recommendations expressed in this documentation are those of the author(s), and do not necessarily reflect those of the NSF.

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